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Honored Contributor
Honored ContributorHow do you connect to the DEV_CLRn pin when it is enabled
I have enabled the device-wide reset (DEV_CLRn) to allow the input signal to reset all my registers. How do I connect to this global input so I can use it for other logic in my Verilog code?
Altera_ForumHonored Contributor
Honored ContributorSorry, I was not clear on my previous post. I will re-state.
Yes, but if I make it user I/O, it will no longer do the asyn reset to all the flops in the part. I still want that plus I want to use the reset signal on that input for things other than resetting all the flops, such as use in some combinatorial logic.
