Forum Discussion
5 Replies
- NormanS_Intel
New Contributor
Hello Hz12,
Thank you for posting in the community!
To ensure you receive the most specialized assistance, we have a dedicated forum that addresses these specific concerns. Therefore, I will be moving this discussion to our FPGA Forum. This will allow our knowledgeable community and experts to provide you with timely and accurate solutions.
Best regards,
Norman S.
Intel Customer Support Engineer
- FvM
Super Contributor
Hi,
the fact that an I/O device can be FPGA based, e.g. an accelerator board doesn't make the DDIO question FPGA specific, I think.DDIO is still solely happening inside the processor.
I understand you are asking about a FPGA based GBit ethernet peer and want to setup DDIO communication with it in the processor.
Regards
Frank - Jeet14
Frequent Contributor
Hi,
I believe DDIO used in the Quartus and Altera IP's, is taken care in the linux drivers.
you can refer the below user guide for General Purpose IO's overview.
Regards
Tiwari
- Jeet14
Frequent Contributor
Hi,
Please let me know if you have any question on this.
Regards
Tiwari
- Jeet14
Frequent Contributor
As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.