how do I generate 32k clock from cyclone V pll

Have you read this? www.altera.com/literature/ug/altera_pll.pdf?gsa_pos=2&wt.oss_r=1&wt.oss=altera_pll (http://www.altera.com/literature/ug/altera_pll.pdf?gsa_pos=2&wt.oss_r=1&wt.oss=altera_pll)

From the Cyclone V handbook:

Each Cyclone V PLL provides clock synthesis for PLL output ports using the M/(N × C) scaling factors. The
input clock is divided by a pre-scale factor, N, and is then multiplied by the M feedback factor. The control
loop drives the VCO to match fin × (M/N).

For Cyclone V, each of M,N,C can be 1..512.

So if your input clock is 50MHz (as an example), then with M=2, N=125, C=25 will give an Fout of 32KHz (ie, 50e6*2/(125*25)).