Forum Discussion
Altera_Forum
Honored Contributor
13 years agoDear FvM
Thanks for your reply. As far as I knew, undefined signals ('U's) could not be detected since they are "undefined." But I just tried to detect them using "if" statements (like
if not(dataa(i) = '1') and not(dataa(i) = '0') then
--blahblahblah
) in my VHDL, I noticed I could detect them. Sorry for my poor understanding... Anyway, using the logic above, I could deal with my problem. Thanks alot, Fvm