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Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

How can I neaten this up?

I have writte some code that works, but its long and looks primitive. Any tips how to rewrite this short and more elegant without change the function of it? I am reading serial bits from a Copernicus GPS module, then displaying them on a LCD for further decoding.

The code works, but it would be hard for someone else to read if I try to get a patent or use snippets of this as portfolio meterial to get a job in this field.

Example 1.

//This is where I read the serial pin from the GPS chip into a FIFO structure

begin

if (bittimer!=bitlength) bittimer=bittimer+1;

if (bittimer==bitlength)

begin

bitstreamin[300]<=bitstreamin[299];

bitstreamin[299]<=bitstreamin[298];

bitstreamin[298]<=bitstreamin[297];

bitstreamin[297]<=bitstreamin[296];

bitstreamin[296]<=bitstreamin[295];

bitstreamin[295]<=bitstreamin[294];

bitstreamin[294]<=bitstreamin[293];

bitstreamin[293]<=bitstreamin[292];

bitstreamin[292]<=bitstreamin[291];

bitstreamin[291]<=bitstreamin[290];

bitstreamin[290]<=bitstreamin[289];

bitstreamin[289]<=bitstreamin[288];

bitstreamin[288]<=bitstreamin[287];

bitstreamin[287]<=bitstreamin[286];

bitstreamin[286]<=bitstreamin[285];

bitstreamin[285]<=bitstreamin[284];

bitstreamin[284]<=bitstreamin[283];

bitstreamin[283]<=bitstreamin[282];

bitstreamin[282]<=bitstreamin[281];

bitstreamin[281]<=bitstreamin[280];

bitstreamin[280]<=bitstreamin[279];

bitstreamin[279]<=bitstreamin[278];

bitstreamin[278]<=bitstreamin[277];

bitstreamin[277]<=bitstreamin[276];

bitstreamin[276]<=bitstreamin[275];

bitstreamin[275]<=bitstreamin[274];

bitstreamin[274]<=bitstreamin[273];

bitstreamin[273]<=bitstreamin[272];

bitstreamin[272]<=bitstreamin[271];

bitstreamin[271]<=bitstreamin[270];

bitstreamin[270]<=bitstreamin[269];

bitstreamin[269]<=bitstreamin[268];

bitstreamin[268]<=GPSIN;

bittimer<=0;

end

/// Example 2, the ASCII byte from the GPS has to sent to the LCD

if (state==7)

begin

twire[7]=gpsasci[229];

twire[6]=gpsasci[228];

twire[5]=gpsasci[227];

twire[4]=gpsasci[226];

twire[3]=gpsasci[225];

twire[2]=gpsasci[224];

twire[1]=gpsasci[223];

twire[0]=gpsasci[221];

end

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    17 years ago

    Do this.

    bitstreamin[300:269] <= bitstreamin[299:268];

    - or you can also include GPSIN directly in one assignment like:

    bitstreamin[300:268] <= {bitstreamin[299:268], GPSIN};

    Similarly,

    twire[7:0] <= gpsasci[229:221];

    Note: If twire is declared with only bits 0-7, and not any more bits, like

    reg [7:0] twire;

    you can also do

    twire <= gpsasci[229:221];
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    17 years ago

    the Verilog generate...endgenerate statement will help out.