Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

How can I get 5.0V FPGA digital signal output?

Hello, everyone.

My name is Ray.

My device is Max 7000 series, EPM7128SLC84-7.

I need 5.0V timing clock, and I set all vccio and vccint at a level at 5.0V power supply.

However, the outputs still remain 3.3V.:confused:

I'd like to ask is there something wrong in my setting?

Thanks for your kindness.:)

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    You need to use buffer like an 74AC541 to translate from 3.3V to 5V. or you can use an mosfet for single output.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Thank you, Actris.

    I used some logic IC to pull-up the output of FPGA before, but there is rise/fall time limitation(10nS) in my application.

    As a result, I change to use a 5V FPGA to get better transition performance.

    Thanks for your kind reply.

    Ray
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    I was under the impression up to now, that MAX7000S series is actually a 5V device. Although there's only a TTL level specification in the datasheet, I can't imagine, why the unloaded output of a CMOS device shouldn't achieve 5V high level? I suspect a problem with your measurement.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Thank you, FvM.

    In the datashht " Max 7000 Programmable Logic Device Family ",

    In page 20, it shows that "The VCCIO pins can be connected to either a 3.3-V or a 5.0-V power supply, depending on the output requirement."

    I just wonder how to set the VCCIO pins.

    I 've checked the output again, and output is at a level 3.3V(digital timing clock).

    The hole number for VCC is 5.0V under measurement.

    Thanks for kind reply.

    Ray