how can i configure CycloneII without cable?

If you are using an EPCS serial flash, then the configuration can be loaded by the FPGA in AS mode without involving a processor. You still can use a processor to write the flash, but in can be also programmed through the FPGA, e.g. JTAG indirect programming.

but i don't know how to configure an epcs16 with a processor because i don't have JTAG connector. i don't find in configuration handbook or in google the bus (I²C, SPI or JTAG...) between the processor and memory to program this flash memory. because my final purpose like i said will be to configure the cycloneII without cable (usb blaster, byte blaster...) but just with a processor and a epcs16

Pasto, I believe that picture shows a generic flash device, not a configuration device which has the ability to program the FPGA directly. The easiest way to program the configuration device (in Active Serial mode) would be through JTAG indirect (jic) using the JTAG header or through a separate Active Serial header as shown in figure 13-7, both using a programming cable. After that, you won't need to use the cable unless you're updating the configuration device with a different image. Like FvM said, you shouldn't need a processor at all with an EPCS16.

So, i can't update a configuration to a cyclone II with just a EPCS16 and a processor connect to a PC without cable ??

Is your processor connected to your PC somehow? Unless you have connections from that processor to the configuration device like those in figure 13-7, I'm not sure how else you would program it. Is your system the same one from that attached picture above? Can you attach a piece of your schematic so we can see what you are working with?

"Is your processor connected to your PC somehow?" => my processor is on a card connect with RS485.

FvM didn't mean parallel data, he meant with parallel bus connections to both the FPGA and processor. JTAG has multiple benefits including easy programming, debug using SignalTap, etc. If you need a board spin, it would really help if you could get that in there. As to your specific question, the Configuration Handbook shows the waveforms necessary to program the device. Sorry, I can't post the link but it's Volume 2, Chapter 3.

The processor has to connect to the four SPI lines, and must in addition disable the FPGA side interface by pulling nCS high. To allow active serial FPGA configuration, the processor SPI lines have to be tri-stated. I used this technique in a number of designs.

ok thanks, i think i understand and you answer to my other post about spi interface too