how can i configure CycloneII without cable?

The processor has to connect to the four SPI lines, and must in addition disable the FPGA side interface by pulling nCS high. To allow active serial FPGA configuration, the processor SPI lines have to be tri-stated. I used this technique in a number of designs.

Alternatively, you can configure the FPGA in PS mode through the processor, or under processor control, as suggested in the (incomplete) schematic in your initial post. Configuration speed will be considerably slower than in FPGA driven AS configuration.

PS would be reasonable, if the involved memory device can't be driven by the FPGA, e.g a parallel flash, or special features are intended, that aren't feasible in AS mode like multiple configurations for Cyclone II.