My FPGA gets really hot after configuration. I've checked my power pins, and they are all connected to the correct supplies which are all within tolerance. Any other suggestions?
--- Quote Start --- A common mistake I've seen is related to the Quartus Unused I/O setting which, by default, is set to 'Outputs Driving GND' and those I/O are connected (directly) to VCC on the board. Make sure that this is not the case - as this will not only increase current consumption, but also damage the I/O buffer. --- Quote End --- :D Thanks! I had the same problem and just figured out what was wrong!