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Altera_Forum's avatar
Altera_Forum
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18 years ago

Hot FPGA!

My FPGA gets really hot after configuration. I've checked my power pins, and they are all connected to the correct supplies which are all within tolerance. Any other suggestions?
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

I concur with Karl. VCC for PLLs should be Vcore level, not VCCIO...