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mstef1's avatar
mstef1
Icon for New Contributor rankNew Contributor
7 years ago

HI, I have a board with a cyclon iv and EPCS64 but te fpga does not strt the programming cycle. I attached the schematic page and the test program I am using. please any help will be appreciated maurizio stefani

HI, I have a board with a cyclon iv fpga. I am using the AS programming mode using a EPCS64. I programmed the EPCS64 but the FPGA is not programmed. I noted: - nCONFIG signal goes low but the nSt...
AnandRaj_S_Intel's avatar
AnandRaj_S_Intel
Icon for Regular Contributor rankRegular Contributor
7 years ago

HI,

  1. Did you test .sof file programming via JTAG configuration, Is it successful?
  • If the .sof file can be configure via JTAG successfully then it is not a power issue since JTAG configuration is successful.
  • If the JTAG configuration with .sof file failed, thus it is a power issue need to check the POR.

You can can check the FPGA device POR monitored power supplied if those power supply are ramped up to the appropriate voltage level according to the device datasheet and are stable throughout the operation. The nSTATUS is only release to high when the FPGA device POR monitored power supplied are power up correctly.

page 165->https://www.intel.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/cyclone-iv/cyclone4-handbook.pdf

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Best Regards,

Anand Raj Shankar

(This message was posted on behalf of Intel Corporation)