Hey,

I would like to use HyperBus memory.

My board will contain cyclone V too.
My question is, how the clock pin in the HyperBus should be connected?
To a standard IO of the FPGA or to a dedicated CLK pin.
Best regards,

Peleg

Question

pkats1 · Answer

link to the HyperBus:https://www.cypress.com/products/hyperbus-memory

sreekumarr_g_intel · Answer

Hello ,

Sorry somehow i missed your questions .

Can I know which cyclone V part number ? Can I know who is driving the clk ? if FPGA it will be good to connect to clock output .

Also are you using IP to map the hyperbis memory ? or your own RTL ?

Thank you,

Regards,

Sree

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