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Altera_Forum
Honored Contributor
14 years agoHelp with CIC decimation filter
Hi, I wrote a Verilog code for a CIC decimation filter. I relied on a code written in the book 'digital signal processing with FPGA' . Here is the code: // cic decimation filter : R=64, M...
Altera_Forum
Honored Contributor
14 years agoThanks KAZ. It finally worked. Well the results are not right but I can take it from here.
@ dabruk: Thanks. I'll keep that in mind.