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So I'm using the Altera Cyclone II development board from Altera. It sounds like the board is designed such that the bank of pins I'm using are powered as you said by 2.5V.
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There is no need to guess. Install the development kit software and review the schematic. Tell me what the kit is, and I'll point you to the correct page in the schematic.
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So I can just use high impedance output 'Z' when I want a high and it will allow the bus to be pulled up to 3.3v?
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If you are implementing I2C, then you *should* be tri-stating to implement a logic high. Why? Well, some I2C devices can clock-stretch by driving the I2C clock signal low. If you have one of those devices and your FPGA drives high, then you will have a buffer conflict, and could possibly damage your FPGA or device SCL buffers.
Cheers,
Dave
Honored Contributor
