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Altera_Forum
Honored Contributor
14 years agoHelp on creating interface between nios processro system with verilog logic
Hi all, I am using nios processor system with some pheripherals and a verilog logic(I got that verilog code from opencores ) in my design.My goal is to send signals (data) from my nios processor t...
Altera_Forum
Honored Contributor
14 years agoThe SOPC subsystem in a component that you can instantiate in your own code. I don't do verilog, but it should be about the same than with vhdl. Look in the generated files if you have a *_inst.v file, it should contain what you need to instantiate the SOPC component in your own verilog file.