Help for counter programme

so far i have this but i am not sure if i am doing the right thing.

library ieee;

use ieee.std_logic_1164.all;

use ieee.numeric_std.all;

entity mini is

port ( en, m_reset, updown, clk : in std_logic;

q : out std_logic_vector (3 downto 0));

end mini;

architecture flow of mini is

signal mini :unsigned (3 downto 0);

begin

process ( en, m_reset, updown, clk )

begin

if (en = '1' and m_reset = '1')

then

q <= "0000");

elsif(en = '0' and m_reset = '1')

then

q <= "0000");