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LouLoulou
New Contributor
New ContributorHelp: Cyclone 10CL025YE144 implementing LVDS receiver and what pins I can do this on and how>
Dear All, I hope this message finds you well. I am currently exploring the implementation of LVDS directly on an FPGA, particularly on a Cyclone 10 LP device. My aim is to interface it with an LVDS ...
AqidAyman_Altera
Regular Contributor
Regular ContributorHi,
As mentioned by @FvM, the Cyclone® 10 LP devices support true input buffers for LVDS I/O standard on the top, bottom, and right I/O banks. For the output buffers for emulated LVDS transmitters with external resistors are only supported on the top and bottom I/O banks.
For more information, refer to this documentation:
Regards,
Aqid
