Altera_ForumHonored Contributor9 years agoHard Copy ASIC for MAX 10 FPGA Design I am interested in getting hardcopy ASIC out of MAX10 FPGA implemented design. The proof of concept is validated in MAX10 FPGA & for production the volume can be around 10K units. The processing engi...Show More
Altera_ForumHonored Contributor9 years agoJust ask to Altera but I think 10k is low volume for ASIC..
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