Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorHandling large arrays in VHDL
I have a constant array of integers (2^8 words deep) declared in VHDL. Each entry is a random number in the range 0-65535. There is a nonlinear mapping between the random numbers and the index of the...
Altera_ForumHonored Contributor
Honored ContributorRegarding the original problem, how to scan the content of a 256x16 table.
A result in one clock cycle can be only achieved by the two solutions mentioned in your post. Alternatively you can implement a binary search tree, that finds the result in 8 steps (8 clock cycles) in a 256x16 ROM table. The method is very similar to the operation of a succesive approximation ADC. Hybrid methods using multiple small tables and 2 or 3 clock cycles should be possible as well.
