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My project doesn't use GXB process pulse event.
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Ok.
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GXB is used to transmit&receive data.
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So what protocol are you using? Since you control the transmit and receive, you get to define what gets used.
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The pulse like "trigger" signal, which enable my logic to process the data from ADC.
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Where does this signal come from, and how do you ensure your ADCs all use a common clock reference? Is the pulse synchronous to the ADC clock reference?
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There also has one TDC channel used alone with each ADC channel. The TDC is used to measure the pulse's "arrival time", which will get a timestamp as i said.
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These timestamps should be system-level synchronous, and synchronous to the master clock.
For example, in my systems we use GPS units with a 1pps output and 10MHz reference. The 10MHz reference is then the synthesizer reference for several hundred 1GHz ADCs.
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The trasmitter in ArriaGX send the data combing with the processed ADC data and the TDC's measuring result together to StratixIVGX. So there seems be one event data should be sent out from ArriaGX to StratixIVGX when each pulse come. Because all data process stages are synchronized, i think each ADC channel's data should arrive at StartixIVGX at the same time if the pulse arrive at dfferent ArriaGX at the same time.
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You have not explained how anything is synchronous or synchronized yet.
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2. Because there are total 22 reciever channels, so the another board must use StratixIVGX. Actually, we have 11 same ArriaGX boards, each board solders two same ArriaGX. Each ArriaGX implements one channel transmitter, these 11 ArriaGX total have 22 transmitter channels. This is why we use one StratixIV chip to hold all 22 channels' data.
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This can be made to work.
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3, I have done a simple test. Different transmitters in different chips, send data at the same time, the receiver side will get data with offset between these two channel. But it seems the offset is constant after power-on or reset. The offset may vary if you reset or power-on again. But, I don't know if this can prove the offset should be alsways constant after power-on? It shouldn't be constant according our real system test, however, i watch long time using simple project thru SignalTap and get a constant value offset.
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Whether or not the receiver channel offsets stay the same depends on how you clock your transceivers. If you use a global clock signal, then both the transmitter and receiver will have the same frequency, and the offsets will not change with time after power-on. This means you can power-up your system, send a test pattern through the network, determine offsets, delete bytes until the transmit-to-receive links all have the same delays, and then "go".
If however you are using independent oscillators on each of your boards, then some oscillators will be slightly faster or slower than others, and eventually your receive FIFOs will over- or under-flow. There are protocols that can deal with this, which they do by inserting or removing 10-bit stuff codes. Your system should not be using these types of protocols.
Cheers,
Dave
Honored Contributor
