graphics and character LCD problem!!

I'm done on the system board kit dev cyclone iii. My system includes components such as the word file "Doc1.doc" below.

My verilog program as follows:

module bt4 (clkin_50, cpu_resetn, lcd_data, lcd_csn, lcd_d_cn, lcd_e_rdn, lcd_rstn, lcd_wen, lcd_en);

input clkin_50;

input cpu_resetn;

inout [7:0]lcd_data;

output lcd_csn;

output lcd_d_cn;

output lcd_e_rdn;

output lcd_rstn;

output lcd_wen;

output lcd_en;

nios_sys DUT (

// 1) global signals:

.clk_0(clkin_50),

.reset_n(cpu_resetn),

// the_GLCD_CSN

.out_port_from_the_GLCD_CSN(lcd_csn),

// the_GLCD_DATA

.in_port_to_the_GLCD_DATA(lcd_data[7:0]),

.out_port_from_the_GLCD_DATA(lcd_data[7:0]),

// the_GLCD_D_CN

.out_port_from_the_GLCD_D_CN(lcd_d_cn),

// the_GLCD_E_RDN

.out_port_from_the_GLCD_E_RDN(lcd_e_rdn),

// the_GLCD_RSTN

.out_port_from_the_GLCD_RSTN(lcd_rstn),

// the_GLCD_WEN

.out_port_from_the_GLCD_WEN(lcd_wen),

// the_lcd_0

.LCD_E_from_the_lcd_0(lcd_en),

.LCD_RS_from_the_lcd_0(lcd_d_cn),

.LCD_RW_from_the_lcd_0(lcd_wen),

.LCD_data_to_and_from_the_lcd_0(lcd_data[7:0])

)

;

endmodule

But when compiling errors like this in word file "Doc2.doc" below.

anybody can help me to fix errors...

thanks.....