Good practice for handling user commands in an FPGA

Hello

Thank you for your approaches. Ok, the processor is a solution but how could in your opinion a structured implementation without processor look like:)?

For my current understanding an approach maybe could like this (I come from the software :) area):

Step 1: Read new command including parameters

1.) Create fifo buffer for command input that saves data from RS232

2.) Create a status machine for processing of input commands

3.) Read new command in a data array called DataPackage[...]

4.) Indicate that new data are ready for processing (inPackageReady)

Step 2: Processing of commands

For any command that will be implemented define a wire:

wire ProcssCmd1 = inPackageReady & (DataPackage[1] == COMMAND1);

wire ProcssCmd2 = inPackageReady & (DataPackage[1] == COMMAND2);

wire ProcssCmd2 = inPackageReady & (DataPackage[1] == COMMAND3);

Step 3: Create a program module for each command and handover parameters

Step 4: Process selected command and create output data if the processing flag ProcessCMDxxx ist enabled

Step 5: Save output data to output fifo

Step 6. Main status machine checks if output data are available and sends it back

What do you think about that? There are probably better solutions...

Friendly regards

Geri