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Honored Contributor
Honored Contributorglitch curiosity
Hallo friends, At simulation stage, Quartus reports some combinational glitches found, all of them under 1nS. Few questions: 1) How accurate is this in real world? 2) The curious part...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- I would certainly not rely on the simulator to tell me if I'm glitch-free. Better instead to use design techniques that guarantee glitch-free operation. --- Quote End --- Indeed! I have to get use to synch world :) After some combinational logic I have, I inserted a dff, clocked by main clock (which is sufficiently greater than this part of design, so 1 tck delay isn't important) and this signal becomes glitch-free. After this, all my signals become nice & clean. Tnx for advices!
