Forum Discussion
Altera_Forum
Honored Contributor
11 years agoHi,
I am little bit confused about control signal of DEMUX in the design (attachment above). Because in "UDP offload example", there are 4 channels which is controlled by channel signal coming from "UDP channel mapper component" for DEMUX. But in my case (Point to point system: see attachment above), I just need to distinguish in DEMUX which signal goes to NIOSII Processor and which signal to hardware and I am confused about control signal of DEMUX. Could anybody please explain it?