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Altera_Forum's avatar
Altera_Forum
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9 years ago

Getting rid of some differential I/O pins and PowerPlay warnings

Hello, I am programming a MAX10 FPGA on Quartus Prime and I got the following warnings: Critical Warning (16562): Review the PowerPlay Power Analyzer report file (<design>.pow.rpt) to ensu...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

The reason why is just to define all my inputs in the top level entity. As I said, there is even an Altera module to handle differential inputs and it helps clearing up that these signals are differential without seeing the Pin Planner. On the other hand, it is not a big issue so I will ignore that warning and leave the design as it is.

Thanks a lot for your help FvM!