Getting rid of some differential I/O pins and PowerPlay warnings

I understand that you want differential IO.

It's normal operation that Quartus supplements the inverted pin for differential IOs that haven't been explicitly assigned, either check if your schematic connects the right pins or just ignore the warning. In the usual design workflow, the (n) pins would have been assigned automatically along with (p) pins in Pin Planner Tool.

The power supply warning is a "watch your step" thing. Most designers will know before that a single supply MAX10xxSC device shouldn't be run with all logic cells switching at several 100 MHz core clock, or it might run hot. If you're unsure about expectable power dissipation of your design, run PowerPlay.