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Altera_Forum's avatar
Altera_Forum
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16 years ago

Generating normally distributed random numbers

Hi, Does anyone have any tips regarding how to generate normally distributed pseudo-random numbers in Verilog or VHDL? Any help would be most appreciated. Regards
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Thats good to see. Im sure Ive seen someone from whoever the VHDL controlling body is coming up with something similar, that I think might make it into the next revision of VHDL (of course not synthesisable - only there for testbenching and verification.)