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Altera_Forum
Honored Contributor
Honored ContributorGenerating normally distributed random numbers
Hi, Does anyone have any tips regarding how to generate normally distributed pseudo-random numbers in Verilog or VHDL? Any help would be most appreciated. Regards
Altera_ForumHonored Contributor
Honored Contributora nice looking VHDL package that can create a signal with a normal distribution:
http://read.pudn.com/downloads111/sourcecode/asm/459855/random1.vhd__.htm
