FTDI FT2232H Sync FIFO + FPGA

Hi JP,

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Is it possible you can share your VHDL/Verilog code for UM232H Synchronous FIFO mode.

Basically the blocks in FTDI Synchronous FIFO mode to Avalon-ST Bridge diagram ?

I just want to use those blocks for interfacing an FPGA for data transfer.

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Sure. I'm in the process of writing a MATLAB .mex interface to the binary version of the protocol, which will allow the highest performance. Once I get that working, I was going to update the documentation, and make sure the _hw.tcl files worked independently of my revision system, eg., an unzipped version of the library could be used directly.

If you want to use the current version of the code ASAP, just email me and I'll send you the code. If you want to wait until next week, I should have the code updated and documented. At that point, I'll post the code here, or on the Altera Wiki for all to use.

Cheers,

Dave