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Altera_Forum's avatar
Altera_Forum
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13 years ago

From one Ethernet to the other

First of all, I don't want to use TSE, I know that is easier but the thing is that I don't want to use the mac address, only take the data without changes and resend.

The only thing that I want is:

- I have two ethernet ports in de de2-115 board with their marvel chips, and I want to connect one port to one computer (computer A) and the other one (computer B) to another computer

- Inside of the fpga I would like to bridge the conections of the two connectors, I mean, for example, the reception of the ETH0 connected to the transmision of the ETH1, and the transmision of the ETH0 connected with the reception of the ETH1 and the same with the other port. This should be like a wire, if I tried to send data from the computer A to the B the fpga should do nothing, only resend.

For this purpose I'm connecting the in MII mode:

- The pins PHY0_RXD[3..0] with the PHY1_TXD[3..0]

- The pins PHY0_RXDV[3..0] with the PHY1_TXE[3..0]

- The pins PHY1_RXD[3..0] with the PHY0_TXD[3..0]

- The pins PHY1_RXDV[3..0] with the PHY0_TXE[3..0]

I'm only wirig this and I thought that could work but... if I try to ping from one computer to the other I get nothing :S

If you could help me it will be great, thanks =)

11 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    I think you already know that this will work only if both Ethernet links operate in the same mode, which must be full duplex.

    Namely they must be both 100Mb full duplex, or both 10Mb full duplex.

    Moreover you must make sure the phy clocks are synchronized, otherwise rx signals coming from one phy would not be sampled correcly into tx ports of the other phy.

    You said you don't have a MAC, or you don't want to use it. Anyway you need at least a MDIO interface to configure the PHYs for proper operation.

    I'm concerned if DE2-115 pcb implements the required strapping pins, since a MAC with MDIO is supposed to be used inside the fpga.
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    I know that the mode should be the same, with a ping should it work?

    About the clocks, if I'm only wiring from one connector to the other, should I take care about the synchronization if I'm only connecting one input with one output??

    I thought that the mdio is preconfigured in this kit and is not needed to be configured for this purpose, am I wrong?? if yes, I thought that there was an ipcore from altera for this configuration but I do't find it, do I need nios? because I'd to avoid its use

    Thank you very very much for your reply =)
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    --- Quote Start ---

    I know that the mode should be the same, with a ping should it work?

    --- Quote End ---

    It MUST, not it should. Please check this point; if the NICs you are using allow it, force a fixed mode, rather than auto negotiation.

    When it works, ping and everything else will work, like you connected the two Ethernet cables together.

    --- Quote Start ---

    About the clocks, if I'm only wiring from one connector to the other, should I take care about the synchronization if I'm only connecting one input with one output??

    --- Quote End ---

    The PHY has separate tx and rx clocks outputs. Then simply wiring input and outputs may not be correct.

    You'd better use some registers to sample phy rx* signals with rx_clk and then drive tx* signals synchronized to tx_clk.

    --- Quote Start ---

    I thought that the mdio is preconfigured in this kit and is not needed to be configured for this purpose, am I wrong?? if yes, I thought that there was an ipcore from altera for this configuration but I do't find it, do I need nios? because I'd to avoid its use

    --- Quote End ---

    You are right. I took a look to DE2-112 manual and I saw there simply a jumper to select RGMII or MII. Set it according to your NIC mode.
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    I tried with the clocks but the ping is not still working, the program that I did was this attached, something simple, with some delays to sync with the clocks, I don't know what is the problem, leds are blinking but... no reply... and wireshark is not showing anything...

    Thanks a lot :(
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    On the upper-left delay line there seems to be a wrong connection between rxd and reset. Is this true?

    What Ethernet speed are you using for testing? 100Mb or 1000Mb?

    Did you try to ping from the other side? I mean ping (or transmit any kind of packet) from one side and attach Wireshark to the other side.
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    The wrong connection was only in this screen sorry for this.

    I was checking my NIC and finally I could set it to 100 Mbps full duplex, great, the funny thing now is that is more or less working, because I'm pinging from pc A to pc B and I get reply but if I do ping from B to A is not working, is weird because if I switch the cables the problem persist and I think that is a problem with the NIC, what do you think??

    Thank you very much for your help
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    I understood the problem is pinging from pc B to pc A. Not from eth0 to eth1 or from eth1 to eth0 on your board. Is this right?

    I believe you have already checked TCP/IP configuration for the two NICs, in particular the subnet mask.

    Did you try pinging between the two PCs without the boards? Does this work?
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    I don't think your delay blocks are enough. You are sending data from one clock domain to the other, with no special synchronization between the two clocks. The RX clock from each PHY is recovered from the incoming packet on the cable, while the TX clock is generated locally with the crystal. There is no guarantee that the two clocks are synchronized, and not even at the same frequency. When transferring data you need a proper clock domain crossing circuitry, for example with dual clock fifos.

  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    Yes, just instantiate both, each one with its SGDMAs. You may have some trouble on the software side though. The last time I checked (but it was several years ago) the NicheStack and the TSE drivers supplied by Altera only support one interface.

  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    The answer to the first question is definitely yes.

    Then, how?

    For the hw part it's simple: you only need to replicate what you did for the first TSE MAC: add another TSE component, DMA, connections to PHY and so on.

    Then it's only a matter of software and drivers, but this depends on what you need to do.