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I have attached the file : test_harness.v
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That's not much to go on with. I'd recommend uploading a synthesizeable example.
This thread has a Modelsim testbench for a dual-port altsyncram
http://www.alteraforum.com/forum/showthread.php?t=35572 write your code to use a generic so that it replaces your inferred component with an altsyncram component.
If you can show that the design can work with altsyncram, then it should also be able to infer an altsyncram from HDL.
At that point, you should be able to determine what is wrong with your inference syntax.
Cheers,
Dave
Honored Contributor
