Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

FPP fails

Hi, I am using a MAX-II Cpld to fulfill the FPP configuration for a Cyclone4gx fpga. The cpld is designed with a flash loader (full function). It was working in my previous design. this time in my...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

It could be a Quartus issue, but experience tells me these problems usually appear with a new major release (e.g. 13.0) and are fixed by the time the first major update appears (e.g. 13.1), which you have.

I'm now assuming you're old hardware worked with a previous release of Quartus - pre 13.0. Can you try that? If that does work it would be worth raising a case with Altera.

I have seen issues of programming halting at CRC checking. This has always been because the FLASH hasn't actually been programmed with anything - often because something has hold of the control bus during programming. However, this isn't flagged by the programmer until it checks the CRC. This could be the case with your system, which might point at the CPLD. Does anything else have access to the FLASH control signals? Is there an arbitration issue?

Regards,

Alex