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Altera_Forum
Honored Contributor
12 years agoFPP configuration of Arria V
Hello I intend to configure my Arria V GX device using Cypress FX3 USB device controller. A previous project here (FX2, Stratix III) did this the very same way, using data[7:0] for configuration f...
Altera_Forum
Honored Contributor
12 years agoIn meantime, I got help from an Altera service request, this is what they answered:
Q: Is there any problem for the userdata[4:0] being driven during FPGA configuration? A: No. Custom I/O pin assigned to replace the 5 dedicated pins (data[4:0]) will not affect the configuration process. Q: Is there any problem for the data[4:0] being driven in user mode? A: No. For the FPP data pins once the device is in usermode (CONF_DONE is high) the device will ignore any data that is sent on the DATA lines.