Forum Discussion
Occasional ContributorFPGA-to-HPS bridge data width on Agilex-7 M-series
Hello
I'm working with Agilex 7 AGM039 device and in platform designer I see that data width of FPGA-to-HPS bridge has only 2 valid options: 128b and 256b, while with Agilex 7 I-series it has 512b option(FPGA-to-HPS Bridge). Also in documentation for Agilex 7 HPS I didn't find any mentions that data width doesn't have 512b option.
So my question is whether it is an undocumented feature or there is something wrong with my Quartus?
Quartus version is 23.4 and Platform Designer 23.4 Build 79.
Hi,
From our factory team, the Agilex 7 M-series is 128/256 bit.
We will update our documentation on this info.
6 Replies
EBERLAZARE_I_IntelRegular Contributor
Hi,
Allow me sometime to double check with our internal team on that settings for Agilex 7 M-series.
- EBERLAZARE_I_Intel
Hi,
We are getting some final confirmation, will get back to you soon.
Mikhail_aHello!
That's good, thank you.
- EBERLAZARE_I_Intel
Hi,
From our factory team, the Agilex 7 M-series is 128/256 bit.
We will update our documentation on this info.
- Mikhail_a
Hello
Thank you for your answer!
- EBERLAZARE_I_Intel
Hi,
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