FPGA retriggerable monostable multivibrator?

The simplest way to do something like that is with a counter. Something like this maybe?

localparam MAX_COUNT = 8'b1110;
reg out;
reg  counter = MAX_COUNT;
always @ (posedge clock) begin
  if (trigger) begin
    counter <= 8'b0;
    out <= 1'b1; //out is set on trigger
  end else if (counter != MAX_COUNT) begin
    counter <= counter + 8'b1;
  end else begin
    out <= 1'b0; // out is cleared after count
  end
end

Obviously you could change the size of the counter, the polarity of the out signal, and the MAX_COUNT (which could even be another register if you want to change it during run time).

The counter is essentially acting as the capacitor in this case, counting up (charging), until some threshold after which the output clears.