FPGA Reconfig fails from other address location in S25FL256L QSPI, but works at 0x000 for ota updat

Hi fakhrul,

1. Assuming the forum case (FPGA Reconfig fails from other address location in S25FL256L QSPI, but works at 0x000 for ota updat) is raised by the same customer, referring to the "OTA update", could you explained the details and how it is being performed? The reason I'm asking is per my understanding there's no documentation explaining on the integration of OTA programing with Generic serial flash controller IP.

--> Refer last question

1. By referring to "remote reconfig updated ip", do you mean Remote Update Intel® FPGA IP or Remote System Upgrades feature that is dedicated in the Cyclone V circuitry?

--> Yes

1. Could you elaborate on how the application is being performed eg. Which configuration scheme, or which interface the ECPQ is being programmed etc?

--> QSPI clock frequency we used 25/15Mhz(both is tested)

--> we are currently using only 4byte addressing in Asx1 mode with all sector unprotected for flashing

--> hi please refer below block diagram , every logic is controlled by USB packet (cmd and data). Also as we said below logic flow is validated in cyclone gtx board with EPCQ256 flash for both the address and image successfully. same logic is ported on cyclone v e board we have.

top level diagram

this is performed from image at address location 0x0000 or in SRAM (same image just difference in User LED for image differentiation & identification) . from this image we performed flashing at image 2 location (image 2 is different from image1 with not ota support and only has watchdog timer reset). Already validated and working great in gtx board.

flow for our image handling. Note for all situation of reconfig back to 0x0000 location, we have reconfig status register read which mentioned error/reason of reconfig back which is validated and working great in gtx board. but in our situation register always reads 0x00 for all failed case in image 2 location, request you to please again read our problem statement raised to get clear idea.

in REconfig block we are setting, ota_configuration read--> ANF bit setting-->watchdog_en-->watchdog timer set-->reconfig page set-->reconfig (done after image is flashed, controlled via usb cms packet also)

we also tried removing watchdog circuitry but no result., same issue.

for Flash programming we followed step --> initial setup --> unprotect flash --> erase sectors --> program flash --> protect --> done

note : here same logic is used for all image , just a base address parameter is updated for target location. (alreadty validated and working great in gtx board.)

thanks & regards,

snehal buche