FPGA PS config issue - FPGA not reporting invalid config bitstream

I have a quick question about passive serial configuration. I am using a MAX II CPLD to program an FPGA uisng an RBF file that is stored in flash.

The issue I am having is as follows - before the flash chips are programmed, they read $FF for all addresses. So the CPLD will try to program the FPGA with a bitstream of all $FF's. I would expect the FPGA to report a config error by bringing the nStatus pin low, however it does not.

When a vaild RBF file is stored in the flash, the CPLD programs the FPGA correctly. When a portion of a valid RBF file is stored in the flash or the RBF file stored in the flash is corrupted in some way, the FPGA correctly reports a programming error by bringing the nStatus pin low.

I just dont understand why the FPGA does not report a config error when readings all $FFs from an unprogrammed flash. I am wondering if it has something to do with the fact that the header of an RBF file always begins with $FF's and perhaps the FPGA reads the bit stream until it gets a value other than $FF, and therefore reads forever and does not report a config error?

Has anyone else seen this behavior, or am I doing something wrong?

Thanks!

Jason