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MZhao20's avatar
MZhao20
Icon for New Contributor rankNew Contributor
5 years ago

FPGA on the configuration of nStatus pull down

During the configuration process of the customer, a low-level pulse appears on the nStatus signal, causing the Config_done signal, which has been pulled up, to be pulled down again.

NStatus signal in the design is a single point network signal, not connected to the outside.

The middle expanded waveform is shown below:

The schematic design is as follows:

1 Reply

  • ShafiqY_Intel's avatar
    ShafiqY_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    5 years ago

    Hi MZhao20,

    Usually, nStatus pin is set to low if it detects a configuration error. This error could be CRC error.

    My recommendation to you is try a simple design (like LED blinking or any simple design) on your board. And observe whether the nStatus behavior is consistent or not.

    Kindly try it out and let me know the result.

    Cheers