My experience dates back 25 years ago. At that time our vendor was Lattice-Vantis and our language was ABEL. It was incredible how we had to code at a flip flop level. There was no in-system programming. It has to be done in a DataIO device, soldered or socketed on the board and tested. Any errors, desocket/desolder and repeat – life was tough.
EEPROM based PLD were getting in to obsolescence and we had to move to either Xylinx or Altera. Why we choose Altera was because of AHDL. Moving from ABEL to AHDL was a breeze. So natural. On the other had moving to VHDL had a learning and the compiler also cost a fortune at that time.
Ever since there has been no looking back from AHDL. Our IP kept building upon AHDL with schematic and Verilog here and there. Support for AHDL, the Megaplugin Wizard or the LPM primitives had not been withering. Today we are in Quartus 20.1 and our device is Cyclone 10LP and we are quite happy, but for the chip non-availability.
I have looked in Efinix. Their IP catalog is primitive. Platform Designer is non existent. Schematic entry is unheard off. One of our team mates commented, “we are anyway out of work. Instead of porting our design to vendor neutral code, we can as well design an open source AHDL plugin or a brand new Platform Designer for Efinix!!”
Jokes apart, Altera tools are great. So please give me some IC’s