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Altera_Forum
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13 years ago

FPGA configuration time and PCIe secification

Has anyone used the PCIe interface of a Cyclone device while configuring it using the AS (active serial) scheme? I'm using a Cyclone IV device (EP4CGX30F484) and planning to use its PCIe interf...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

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Hi JP,

If your board is a PCIe end-point (peripheral), then that end-point must be ready to handle PCIe enumeration bus cycles shortly after reset, otherwise the BIOS will not enumerate the board.

In some cases you can violate this requirement, and re-enumerate the PCIe bus at a later time. Linux supports this to some extent, but its a bit of a hack.

In your case, you can pretty much do whatever you like. Worst-case you hit reset on the PC and force a warm reboot.

Cheers,

Dave

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Thanks Dave. A question off topic.

I am working on a card using EP4CGX15 which will receive lvds data input and store it in PCs memory (thru PCIe link). Lets say to begin with I want to toggle an LED through PCIe.

Can you suggest a very simple altera topology (building block) that I can work towards on the programming side. (Qsys etc)

If I create a megacore function of PCIexpress and be able to talk to the Avalon ST interface through a logic block will that be enough ? Or DMA is needed for sure.

Thanks

JP