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Altera_Forum
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13 years ago

FPGA configuration time and PCIe secification

Has anyone used the PCIe interface of a Cyclone device while configuring it using the AS (active serial) scheme? I'm using a Cyclone IV device (EP4CGX30F484) and planning to use its PCIe interf...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

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Arguably tRAMP is tPOR(min), so you could just use tPOR(max) = 9ms.

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This is what I mean.

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However, if you're within 3ms of the 100ms requirement, you're too close, and your system would likely fail in many systems, since even the 100ms value is not a guarantee. Read the references in the PDF link I gave above.

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What is the statistically proven safe border ( close to 100ms ) for a safe custom board enumeration in any PC?I

UPD:

In what references can I read about it?