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Altera_Forum
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13 years ago

FPGA configuration time and PCIe secification

Has anyone used the PCIe interface of a Cyclone device while configuring it using the AS (active serial) scheme? I'm using a Cyclone IV device (EP4CGX30F484) and planning to use its PCIe interf...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

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Handbook says ( p.11-4 ): "The MSEL pin settings determine the POR time (tPOR) of the device.", but not tRAMP.

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If you select Fast POR, then your hardware design must meet tRAMP.