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Altera_Forum's avatar
Altera_Forum
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13 years ago

FPGA configuration time and PCIe secification

Has anyone used the PCIe interface of a Cyclone device while configuring it using the AS (active serial) scheme? I'm using a Cyclone IV device (EP4CGX30F484) and planning to use its PCIe interf...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

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Meanwhile, I'll try to get more info about CLKUSR mode to clarify if its possible to set DCLK=40MHz.

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I doubt there is a setting to specify the clock frequency. The handbook gives the range of valid frequencies. Its up to you to provide CLKUSR on the board.

You will have to make sure you set the design up so that it uses an external DCLK source for configuration. I've not had to do that, so cannot provide advice (though could look at the handbook if you have questions you cannot figure out yourself).

Cheers,

Dave