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Compression might help you get under the limit. If your PCIe end-point logic will never change, or is completely under your control, then you could use this scheme.
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Yes, this is my case.
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...but by the time you add in the POR delay, and any power supply delays, eg. due to hot-swap controller or power manager IC, then you might be out of time.
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Now getting back to the very beginning to what I was asking for:
What timings ( POR-related, etc. ) I have to add to calculate that extra time?
Meanwhile, I'll try to get more info about CLKUSR mode to clarify if its possible to set DCLK=40MHz.
Honored Contributor
