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Altera_Forum
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12 years ago

FPGA 2 SDRAM bridge reference

hi All, I am working on design a system that FPGA can access SDRAM of HPS through F2S bridge. Where can find the reference design (include hardware / software project ) ? Thank...
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Altera_Forum
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12 years ago

hi aprado,

I have done the Qsys intregration as thread mentioned. but when I control the DMA to read data from HPS SDRAM into On-chip RAM of FPGA , the DMA action has finished, but the data is not consistent.

Can you take a look at my Qsys design and DS-5 Bare-metal software code ?

1) Bare-metal: https://www.dropbox.com/s/q44vgldbxc39qnj/altera-socfpga-hardwarelib-fpga-cv-gnu.7z

2) QSYS: https://www.dropbox.com/s/z512he9nb0ma4jp/soc_system.qsys

Thanks.

Lucian