Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorFmax for generated clock on Cyclone III EP3C120F780C7
Hello, I'm working on a design which has a 125 MHz input signal. I have a small part in the FPGA which I wanted to clock with 375 MHz. I've created an altpll module using the MegaWizzard Plug-I...
Altera_ForumHonored Contributor
Honored ContributorI don't know what your block is supposed to do, but as it is rather small, you may be able to parallelize it, using several blocks running at a fraction of the frequency.
