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Altera_Forum
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13 years ago

Fmax for generated clock on Cyclone III EP3C120F780C7

Hello, I'm working on a design which has a 125 MHz input signal. I have a small part in the FPGA which I wanted to clock with 375 MHz. I've created an altpll module using the MegaWizzard Plug-I...
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Altera_Forum
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13 years ago

375Mhz is at the top end of speeds supported by the top end devices. In a C3 you'll be lucky to get much over 200MHz.

The FMax is down to the logic design rather than the clock itself. At 375 (if the FPGA will even go that fast, which I highly doubt it will) you have to have very very well designed logic.