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Altera_Forum
Honored Contributor
Honored ContributorFloading Point divider, throughput/latency
Hi all, I'm considering using the floading point blocks available from Altera in a design I have. Throughput is a top priority as I'm doing complex image transformation for high speed application...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- If you want to have an RTL simulation that is consistent with the real device, let the input data change silightly before the edge of the clock that registers it. --- Quote End --- How do you suggest doing this in synthesizableRTL code?
