Forum Discussion
Altera_Forum
Honored Contributor
16 years agoFixed Point or Floating point implementation
I need to implement closed loop controllers like multiple PID controller in FPGA. I also need to do some signal preconditioning and signal processing in fpga.
I would like to know if its better to implement the controllers using a fixed point or floating point math. I have tried altera floating point megacore but the implementation takes up a lot of LEs. Is there is better and reliable way of implementing PID controller in fixedpoint math.4 Replies
- Altera_Forum
Honored Contributor
--- Quote Start --- Thanks for your reply. Is the IEEE VHDL 200X fixed point package by David Bishop a good one to start with if I use fixed point? You are correct the floating point implementation takes up a lot of logic and clocks. --- Quote End --- Perfect place to start, but quartus doesnt support the 2008 version (yet) You can get a version thats compatible with VHDL 93 here: http://www.vhdl.org/fphdl/ You can do fixed point with numeric_std package or if you have to, the std_logic_arith package, but the fixed point package can really help your sanity tracking fractional bits! - Altera_Forum
Honored Contributor
Thanks for your reply.
Is the IEEE VHDL 200X fixed point package by David Bishop a good one to start with if I use fixed point? You are correct the floating point implementation takes up a lot of logic and clocks. - Altera_Forum
Honored Contributor
If your controller parameters cover a wide dynamic range, you'll possibly find, that implementing variable scaling respectively a parameter exponent involves less overall effort than extending the word length. In so far, it can be still meaningful to use a combination of float and fixed point variables in signal processing or digital controllers. But you most likely won't use standard IEEE float formats.
- Altera_Forum
Honored Contributor
Fixed point arithmatic is the same as integer arithmatic, so therefore very fast and very cheap in FPGAs
Floating pouint is slow and logic hungry. Always avoid floating point in FPGAs when possible.