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JET60200's avatar
JET60200
Icon for Contributor rankContributor
5 years ago

Fitter cannot place 2 periphery component(s) due to conflicts with existing constraints (2 pin(s)).

we use “10AS066H3F34I2LG” device, and in our hw design, HPS uses shared I/O as following: * HPS_I2C1_SDA @ C18 ( SHARED_Q4_1 ) * HPS_I2C1_SCL @ D17 ( SHARED_Q4_2 ) But then buil...
Eliath_G_Intel's avatar
Eliath_G_Intel
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Hi Shenzen,


First of all, thanks for reaching us.


Are you trying to map the pins to the FPGA region? please explain to me a little more of what are you trying to do so i can have a better understanding of what is going on but the first step is to check the pin assignment name that you are not using the same name or assignation for different pins.


Regards,

-Eliath Guzman